ASIC · DSP 01
1024-Point Fixed-Point FFT
A radix-2 DIT FFT processor using Q1.15 arithmetic, a reusable butterfly, twiddle ROM, and dual SRAMs, taken through design and physical implementation.
Radix-2 DITQ1.15Physical design
Explore project EE · COLUMBIA UNIVERSITY · NYC
Engineering notebook / 001
Building at the intersection of hardware & ideas.
I’m Xingcan, an Electrical Engineering student at Columbia. I explore digital design, EDA workflows, and signal processing—and document what I learn along the way.
Curious by design
DESIGN_SPACE / XC •••
FOCUS_01
Digital design
FOCUS_02
EDA workflows
FOCUS_03
Signal processing
Selected work / 2024—26
Things I’m building.
A few engineering threads I’m exploring across EDA, programmable logic, and digital signal processing.
FPGA · Embedded systems 02
Idaho Trail FPGA Game System
A team-built Oregon Trail-inspired game system on a DE1-SoC, with a 640×480 VGA interface and a hardware/software design split.
SystemVerilogCVGA
Explore project ASIC · DSP 03
64-Tap 16-Bit FIR Filter
A sequential multiply-accumulate FIR implementation with fixed-point input, coefficient, and output formats, clock-domain considerations, and a 10 kS/s target.
FIRFixed pointIBM 130 nm
Explore project EDA · Synthesis 04
Genus Design-Space Exploration
An individual course assignment comparing sampled Cadence Genus synthesis configurations for a double-precision FPU, with timing and area-delay observations.
Cadence GenusFPUDesign space
Explore project Analog IC · Team project 05
Switched-Capacitor Gain-of-Two Amplifier
A Columbia analog IC course team project designing and evaluating a switched-capacitor amplifier, documented in a collaborative report.
Switched capacitorOTAAnalog IC
Explore project EDA · In progress 06
Hybrid Flow Tuner
A team proposal for combining LLM-guided search-region selection with a numeric optimizer for VLSI design-flow tuning. This is a proposal, not a completed result.
VLSIOptimizationTeam proposal
Explore project A quick introduction
A curious engineer, learning in public.
My interests live where abstract ideas meet real systems: modeling a signal, describing hardware, then understanding how the pieces behave together.
More about me →01 / THINK
Start from the model
Make assumptions visible, then turn them into a design that can be examined.
02 / BUILD
Make ideas tangible
Work across code, circuits, and tools to see how theory meets implementation.
03 / MEASURE
Ask what changed
Use reproducible checks and clear evidence to understand a result.
04 / SHARE
Leave a useful trail
Write notes so the next person—and future me—can follow the reasoning.
Field notes / Latest writing
Ideas, in progress.
Technical walkthroughs and short notes from the things I’m learning.
5 min read
A Practical Way to Think About EDA Workflow Optimization
A framework for making an engineering design flow easier to inspect, reproduce, and improve—without starting from an unverified speedup claim.
EDAWorkflowReproducibility
6 min read
Thinking in Transactions: A Starting Point for FPGA Streaming Designs
A small mental model for describing stream interfaces, latency, and backpressure before writing RTL.
FPGARTLDigital Design
Keep exploring